Generally speaking, there are four distinct techniques of packaging a semiconductor device, in any case said package having one or more layers of conductive lines (leads, traces, or the like) exiting the package for electrically connecting the packaged die to other components, whether by mounting directly to a printed circuit (mother) board or by plugging the packaged device into a socket which in turn is mounted to the mother board. These are:
(1) plastic molding; PA1 (2) ceramic packaging; PA1 (3) PCB-substrate type packaging; and PA1 (4) tape-based packaging.
Plastic molding typically involves a relatively rigid lead frame, wherein the lead frame has a patterned layer of conductive leads (conductive lines), the inner ends of which define a die-receiving area to which the die is mounted. In some cases, the die is mounted to a die paddle, within the die-receiving area, and is connected to inner end portions of the conductive leads. The die and inner portion of the lead frame are encapsulated by plastic molding compound. Outer end portions of the conductive leads extend outside of the molded plastic body, forming external leads which are typically bent into various configurations (e.g., J-lead, gull wing, etc.).
Molding compounds for plastic packages are typically resins, such as advanced B-stage compounds. For electronic packaging, the preferred resin is epoxy.
Ceramic packaging typically involves one or more layers of conductive traces (conductive lines) applied on interleaved ceramic layers. Again, a die is mounted to a die-receiving area defined by the inner ends of the conductive traces. Outer layers are typically ceramic. The die is mounted in a cavity (either up or down), connected to inner ends of the traces, and the cavity is closed by a lid. Outer ends of the traces are connected, within the ceramic, to external pins or leads (for example) on the exterior of the ceramic package body.
PCB-substrate type packaging involves a patterned layer of conductive traces (conductive lines) on a printed circuit board (PCB) substrate, and the inner ends of the conductive traces define the die-receiving area. The die is mounted to the substrate, connected to the inner ends of the traces, and may be encapsulated by epoxy, or in any suitable manner. Outer ends of the traces are connected to external pins or leads (for example), in a manner similar to ceramic packaging.
Tape-based packaging involves a relatively non-rigid foil of conductive leads (conductive lines), supported by a plastic layer, and the inner ends of the conductive traces define the die-receiving area. A die is mounted to the substrate formed by the layer of conductive leads and plastic, and is connected to the inner ends of the conductive leads. Outer ends of the leads are connected to (or form) external interconnects for the packaged die.
In any of these, or other, packaging techniques, a die connected to conductive lines and having some sort of support and/or package body is referred to as a "semiconductor device assembly".
To one degree or another, each of these packaging techniques suffer from a common problem--namely, when the die heats up (due to operation), it expands. While the package surrounding the die also heats up, it often expands at a rate different than that of the die. For example, many substrate materials (e.g., PCB) exhibit a rate of thermal expansion that differs from that of a silicon die. Package bodies, such as plastic or epoxy, also tend to expand at a different rate than that of the die.
When package elements (substrate, body) do not expand at a rate equal to that of the silicon die (which is normally formed of crystal silicon material), a number of problems are evident. One problem is breakage of the die. Simply stated, a broken die is a failed die. Another problem is evident with respect to the electrical connections (e.g., of the lead frame or the like) to the die. The mismatched expansion of the die and package elements exerts strain on these connections, which may cause them to fail completely. Simply stated, a packaged die with even one failed electrical connection is generally completely useless. These problems are exacerbated by the requirement (i.e., the reality) that the packaged semiconductor device not fail over a wide range of temperatures. Moreover, the problems of thermal expansion mismatch manifest themselves more dramatically when the packaged device experiences relatively rapid temperature changes. Generally, there are two sources of heat affecting semiconductor devices: (1) heat generated internally by the device as it is operating; and (2) heat incident to processing (e.g., packaging) the semiconductor device. For example, vapor soldering exposes the partially-packaged die to very rapid temperature change (i.e., increase in temperature). A reliable packaging technique would be able to accommodate temperature ranges from as low as -25.degree. C. to as high as 125.degree. C.
In the ensuing discussion, the focus is primarily on plastic packaging techniques. Present plastic packaging techniques involve molding a plastic "body" around a semiconductor die. Prior to molding, the die is attached to a lead frame having a plurality of leads ultimately exiting the package body for connecting the semiconductor device to external circuits, such as via conductors on a printed circuit board. Various forms of plastic packs are known, including DIP (Dual In-line Package), PQFP (Plastic Quad Flat Pack) and PLCC (plastic leaded chip carrier). Plastic packages tend to be relatively inexpensive (e.g., vis-a-vis ceramic packages). However, plastic packages are not as durable (hard) as other package types (e.g., ceramic) and are not as hermetic as other package types (e.g., ceramic). Plastic packages tend to be relatively soft, and exhibit a relatively high degree of gas permittivity.
Notwithstanding the above, plastic packaging techniques have proven to be fairly adequate for small (less than ten millimeters on a side) dies. The problem of thermal expansion mismatch between die and package elements is exacerbated as dies become larger and larger. For example, as die sizes have grown beyond 10 mm.times.10 mm, simple plastic packages have been found to be inadequate (vis-a-vis the effects of thermal expansion mismatch). This problem has been addressed by the use of silicon-based "die coat" materials, which are applied over the die (and typically over bond wires) before the injection molding process is complete. These die coats increase the cost of the packaged device, increase the complexity of the packaging process, and adversely affect the long term reliability of the device due to mobile ion contamination from the die coat. A reliable packaging technique would accommodate large (i.e., greater than ten millimeters on a side) dies as well as small dies, without exerting unacceptable levels of mechanical stress on the die and on the connections to the die.